Dr. Karl D. Hirschman, Assistant Professor,
Rochester Institute of Technology
Microelectronic Engineering
82 Lomb Memorial Drive
Rochester, New York 14623
Fax: (585) 475-5041
Tel: (585) 475-5130
Email:
kdhemc@rit.edu
Karl D. Hirschman received the B.S. degree in Microelectronic Engineering in 1990 and the M.S. degree in Electrical Engineering in 1992 from the Rochester Institute of Technology, Rochester, NY. He received the Ph.D. degree in Electrical Engineering in 2000 from the University of Rochester, Rochester, NY. Dr. Hirschman has been on the faculty of the Microelectronic Engineering at RIT since 1993. Prior to teaching at RIT, he worked for IBM at the Advanced Semiconductor Technology Center in East Fishkill, NY as a process development engineer. His research interests include silicon-based optoelectronics and tunneling transport devices, where he has published over 30 technical papers. He is an active member in the IEEE EDS and MRS, and has served as an officer of the Rochester IEEE Electron Device Society local chapter for the last eight years. He coordinates the IEEE Annual EDS Activities in Western NY conference, and is also serving on the IEEE/SEMI ASMC steering committee.
Experience
Rochester Institute of
Technology, Rochester, NY
Director,
Semiconductor & Microsystems Fabrication Laboratory (2001 – present)
Assistant Professor, Department
of Microelectronic Engineering
(1997 – present)
Instructor,
Department of Microelectronic Engineering
(1993 – 1997)
IBM Microelectronics, East
Fishkill, NY (1990
– 1993)
Process
Development Engineer, Advanced Semiconductor Technology Center,
CMOS
logic & DRAM process development
Education
Ph.D., Electrical and
Computer Engineering, University of Rochester, 2000.
Advisor: Philippe M. Fauchet
Thesis: "Fabrication and Characterization
of Oxide-Passivated
Nanocrystalline Silicon Light Emitting Devices"
M.S.,
Electrical Engineering, Rochester Institute of Technology, 1992.
B.S.,
Microelectronic Engineering, Rochester Institute of Technology, 1990.
Current Research Interests:
·
Si-based optoelectronics
·
Tunneling transport devices for memory and logic
·
Integration of novel device structures in silicon technology
·
Quality engineering for process capability improvement
Awards and Citations:
·
Nomination for the RIT Eisenhart Excellence in Teaching Award
for 1997, 1998, 1999
·
IEEE Rochester Chapter, Electron Devices Society Service
Award in 1998 and 1999
·
RIT QED (Quality Engineering by Design) Robust Award in 1996
and 1999
·
Quality Medal from Wismar Engineering School (Maritime
Navigational School) in 1997
Current Funded Research:
1) RIT Kate
Gleason College of Engineering, Research and Development Initiative Award,
1-year duration, PI with Dr. T.G. Brown (Co-PI, UR Institute of Optics): "Silicon-on-Insulator Based
Modulators and Switches for High Speed Optical Telecommunications"
2) NSF grant
ref: ECS-0080760, 3-year duration, Co-PI with Dr. Santosh Kurinec (Co-PI) and
Dr. Paul R. Berger (PI, Ohio State): "Si-Based Tunnel Diode Integration with CMOS and SiGe
HBTs"
Undergraduate Senior Project Advisees: Joseph Miceli (2000), Burcay Gurcan
(1999), Tina Wheaton (1999), Jason Benz (1998), Chai Ing-Cheng (1998), James
Daniels (1997), Abram Detofsky (1997), Daniel Fullerton (1997), Daniel
Carderelli (1996), Lena Zavyalova (1996), Von Jerick Marcos (1995), Manish
Gulati (1995)
Graduate Student Advisees: (1) Suraj Bhaskaran, (M.S. 2000) Design
of RIT's Submicron CMOS Process, (2) Ian Livingston, (M.S.
1999) Fabrication of an Integrated Surface Micro-electro-mechanical
Capacitive Pressure Sensor, (3) Keith Capasso, (M.S. 1999) Process
Development and Reliability of Thin Gate Oxides, (4) Michael
Shippers, (M.S. 1996) Process Design for Charge-Injection Based Imaging
Array Fabrication, (5) Nipun Saxena, (M.E. 1995) Feasibility Study of a CCD
Controller/Driver for Field Emission Display Applications, (6)
Raymond Talacka, (M.S. 1994) Design and Fabrication of Lateral High Power
Devices for Power Integrated Circuit Applications, (7) Terrance J.
Fennelly, Jr., (M.S. 1994) Statistical Methodologies for the Estimation and
Reduction of Process Variation, (8) Shubhra Srivastav, (M.E.
1994) Short-Loop Optimization of the P-well CMOS Process at RIT, (9)
Reuben Ferguson, (M.E. 1994) Design and Simulation of a CCD
Controller/Driver for Field Emission Display Applications
Selected Publications: Silicon-Based Devices
1.
K.D. Hirschman, N.E. Wescott, J. Neiser and
T.G. Brown, "Silicon-on-Insulator Based Modulators and Switches for
High Speed Optical Telecommunications," IEEE UGIM Symp. Proc. 14, 64 (2001).
2.
S. Kurinec, J. Kempisty, K.D. Hirschman, N.
Jin, S. Chung, P. Berger and P. Thompson, “Integration of Silicon
Based Tunnel Diodes with CMOS: An
RIT-OSU-NRL-NSF Effort,” IEEE UGIM Symp. Proc. 14, 74
(2001).
3.
K.D. Hirschman and P.M. Fauchet , "Modeling
Carrier Transport in Oxide-Passivated Nanocrystalline Silicon LEDs," Mat.
Res. Soc. Symp. Proc. 638 (2001).
4.
K.D. Hirschman, L. Tsybeskov, S.P. Duttagupta
and P.M. Fauchet, "An All-silicon Integrated Light Emitter
Technology," Quantum Optoelectronics Technical Digest 9, p.
x+152, 135-7 (1997).
297,
254 (19
5.
K.D. Hirschman, L. Tsybeskov, S.P. Duttagupta
and P.M. Fauchet, "Silicon-based Visible Light-Emitting Devices
Integrated Into Microelectronic Circuits," Nature 384, 338
(1996).
6. C.
Peng, K.D. Hirschman and P.M. Fauchet, "Carrier
Transport in Porous Silicon Light-Emitting Devices," J.
Appl. Phys. 80, 295 (1996).
1. K.D.
Hirschman, "A Tolerance Analysis for Manufacturing to Direct Process
Capability Improvement Efforts," IEEE/SEMI ASMC Symp. Proc. 11,
377 (2000).
2. K.D.
Hirschman and P.D. Rack, "Exploring Silicon Process Technology Through
RIT's NPN BJT Process,” IEEE UGIM Symp. Proc. 13, 94
(1999).
3. L.F.
Fuller, K.D. Hirschman, "Teaching CMOS Integrated Circuit Manufacturing
Laboratory Using a Student Operated Factory," IEEE
UGIM Symp. Proc.12, 182 (1997).
4. K.D.
Hirschman, T.J. Fennelly, Jr., "A Statistical Strategy for Directing Process
Capability Improvement Efforts," IEEE ISSM Symp. Proc. 4, 41
(1995).