Publications

Book Chapters

D. Kudithipudi, C. E. Merkel, M.Soltiz, G.S.Rose, R.Pino, “Design of Neuromorphic Architectures with Memristors,” in Network Science and CyberSecurity, Springer, 2014

Rose, G. S., Kudithipudi, D., Khedkar, G., McDonald, N., Wysocki, B., & Yan, L. K.  "Nanoelectronics and Hardware Security". In Network Science and CyberSecurity (pp. 105-123). Springer New York, 2014 

D. Kudithipudi and C. E. Merkel “Reconfigurable Memristor Fabrics for Heterogeneous Computing,” in Advances in Neuromorphic Memristor Science and Applications, Springer, 2012.

 

D.Kudithipudi, A. Coskun, Q. Qiu, “Thermal Management in Many-Core Systems”, in Evolutionary based solutions for green computing, published in Springer, 2012.

 

J. Kevin Hicks, D. Kudithipudi, “Subthreshold Computing”, in Handbook of Energy-Aware and Green Computing, Chapman & Hall/CRC Computer & Information Science Series, December 26th 2011.

 

Publications in Refereed Journals

G.Khedkar, D. Kudithipudi,G.S.Rose, “Power Profile Obfuscation using Nanoscale Memristive Devices to Counter DPA Attacks”, IEEE Transactions on Nanotechnology, 2015.

 

C. Merkel, D. Kudithipudi, “A Temperature Sensing RRAM Architecture for 3D-ICs”, IEEE Transactions on VLSI, 2014.

 

M.Soltiz, D.Kudithipudi, C.Merkel, G. Rose, and R.Pino, “Memristor-based Neural Logic Blocks for Non-linearly Separable Functions”, IEEE Transactions on Computers, 2013. 

 

J.K.Hicks, D.Kudithipudi, “Hybrid Subthreshold and Nearthreshold Design Methodology for Energy Minimization”, J. Low Power Electronics, Vol. 7, N°2, pp 1-13, April 2011.

 

S.H. Tavva, D.Kudithipudi, “Characterization of Variation Aware Nanoscale SRAM Designs”, J. Low Power Electronics , Vol. 6, N°1, April 2010.

 

D. Kudithipudi and E. John, “Characterization of Adder circuits in Nanotechnology Designs”, International journal of Embedded Systems, Volume 4, Number 1 / 2009, Pages: 17 – 26, 2009.

 

D.Kudtihipudi,S.Petko, and E.John, “Caches for Multimedia Workloads: Power and Energy Trade-offs”, IEEE Transactions on Multimedia, Vol. 10(6), pp: 1013-1021 (2008).

 

D. Kudithipudi and E.John, “Static Power Analysis and Estimation in Ternary Content Addressable Memory Cells”,J. Low Power Electronics 3, 293–301 (2007).

 

D. Kudithipudi and E.John,” Implementation of Low Power Digital Multipliers using 10 transistor Adder Blocks”, J. Low Power Electronics 1, 286-296 (2005).

 

Publications in Conferences

Cory Merkel, Dhireesha Kudithipudi, "Comparison of Off-Chip Training Methods for Neuromemristive Systems", VLSI Design (VLSID), 2015 28th International Conference on, pp.99-104, Jan. 2015.

 

Khedkar, G.; Kudithipudi, D.; Rose, G.S., "Power Profile Obfuscation Using Nanoscale Memristive Devices to Counter DPA Attacks", Nanotechnology, IEEE Transactions on , vol.14, no.1, pp.26-35, Jan. 2015.

 

Cory Merkel, Dhireesha Kudithipudi, "A current-mode CMOS/memristor hybrid implementation of an extreme learning machine", Proceedings of the 24th Edition of the Great Lakes Symposium on VLSI, GLSVLSI '14, pp. 241-242, 2014.

 

Cory Merkel, Qutaiba Saleh, Colin Donahue, Dhireesha Kudithipudi, "Memristive Reservoir Computing Architecture for Epileptic Seizure Detection", 5th Annual International Conference on Biologically Inspired Cognitive Architectures, 2014 BICA, vol.41, pp.249-254, 2014.

 

Dhireesha Kudithipudi, Cory Merkel, Yu Kee Ooi, Quitaba Saleh, Garrett S Rose, "On designing circuit primitives for cortical processors with memristive hardware", System-on-Chip Conference (SOCC), 2014 27th IEEE International, pp.371-376, Sep. 2014.

 

Cory Merkel, Dhireesha Kudithipudi, "A stochastic learning algorithm for neuromemristive systems", System-on-Chip Conference (SOCC), 2014 27th IEEE International, pp. 359-364, Sep. 2014.

 

Cory Merkel, Dhireesha Kudithipudi, Ray Ptucha, "Heterogeneous CMOS/memristor hardware neural networks for real-time target classification", Proc. SPIE 9119, Machine Intelligence and Bio-inspired Computation: Theory and Applications VIII, 911908 (May 22, 2014).

 

 

Dhireesha Kudithipudi, Cory Merkel, Mike Soltiz, Garrett S Rose, Robinson E Pino, "Design of Neuromorphic Architectures with Memristors", Network Science and Cybersecurity, vol. 55, pp. 93-103, 2014.

 

S.Mohanram, D.Brenner and D.Kudithipudi, “Hierarchical Optimization of TSV Placement with Inter-Tier Liquid Cooling in 3D-IC MPSoCs”, Semiconductor Thermal Measurement and Management Symposium (SEMI-THERM), 29th Annual IEEE, 17-21 March 2013.

 

Cory Merkel, Dhireesha Kudithipudi, Nick Sereni, "Periodic activation functions in memristor-based analog neural networks", Neural Networks (IJCNN), The 2013 International Joint Conference on, pp.1-7, 2013.

 

G.Khedkar, D.Kudithipudi, “RRAM Motifs for DPA Mitigation in 3D-ICs”, in Proceedings of IEEE ISVLSI’2012, Amherst, MA.

 

Cory E Merkel, Dhireesha Kudithipudi, Andres Kwasinski, "Lightweight energy prediction framework for solar-powered wireless sensor networks", SOC Conference (SOCC), 2012 IEEE International, pp.131-136, Septeber 2012.

 

Khedkar, G.; Kudithipudi, D., "RRAM Motifs for Mitigating Differential Power Analysis Attacks (DPA)", VLSI (ISVLSI), 2012 IEEE Computer Society Annual Symposium on , vol., no., pp.88,93, 19-21 Aug. 2012.

 

M.Catanzaro, D. Kudithipudi, “Reconfigurable RRAM for LUT Logic Mapping: A Case Study for Reliability Enhancement”,  in proceedings of IEEE SOCC 2012, Niagara Falls, NY.

 

C.Merkel, D.Kudithipudi, A.Kwasinski, “Lightweight Digital Filter for Solar Energy Harvesting Wireless Networks”, in Proceedings of IEEE SOCC 2012, Niagara Falls, NY.

 

M. Solitz, C. E. Merkel, D. Kudithipudi, “RRAM-based Adaptive Neural Logic Block for Implementing Non-Linearly Separable Functions in a Single Layer,” NANOARCH, 2012.

 

D. Brenner, C. E. Merkel, D. Kudithipudi, “Design-Time Performance Evaluation of Thermal Management Policies for SRAM and RRAM based 3D MPSoCs,” Great Lakes Symposium on VLSI (GLSVLSI), May, 2012, Salt Lake City, USA.

 

C. Merkel, D. Kudithipudi, “Towards Thermal Profiling in CMOS/Memristor Hybrid RRAM Architectures,” International Conference on VLSI Design (VLSID ’12), Hyderabad, India, 2012.

 

C. Merkel, D. Kudithipudi, “Reconfigurable N-Level Memristor Memory Design,” International Joint Conference on Neural Networks (IJCNN ’11), San Jose, CA, 2011.

 

C.Merkel, D.Kudithipudi, ” Lightweight Energy Prediction Filters for Solar-Powered Wireless Sensor Networks”, In proceedings of 6th International Workshop on Unique Chips and Systems, ( Held in Conjunction with IEEE MICRO)Georgia Tech, Atlanta, GA, 2010.

 

S. Amarchinta, D. Kudithipudi, “Ultra Low Energy Standard Cell Design Optimization For Performance and Placement Algorithm”, Workshop on Work in Progress in Green Computing, Chicago, Aug 16-18, 2010.

 

A.Kwasinski, D. Kudithipudi, “Towards Integrated Circuit Thermal Profiling for Reduced Power Consumption: Evaluation of Distributed Sensing Techniques”, Workshop on Work in Progress in Green Computing, Chicago, Aug 16-18, 2010.

 

S.H.Tavva, D.Kudithipudi, “Variation Tolerant 9T SRAM Cell Design”, ACM Great Lakes Symposium on VLSI 2010, Providence, Rhode Island, May 16-18, 2010.

 

S.Amarchinta, J.Moon, and D.Kudithipudi, “Performance Enhancement Of Subthreshold Circuits Using Substrate Biasing And Charge-Boosting Buffers”, ACM Great Lakes Symposium on VLSI 2010, Providence, Rhode Island, May 16-18, 2010.

 

K.F.Ng, K.Hsu, D.Kudithipudi, “A Parallel-Segmented Architecture for Low Power Content-Addressable Memory“, IEEE International System on Chip Conference (SOCC-2009), Belfast,North Ireland,UK, Sep. 9-11, 2009.

 

M.N.Michael, D.Kudithipudi, “DVFS with Multi-Clock Distribution Systems on SPARC Core “, 4th Annual Austin Conference on Integrated Systems & Circuits 2009, Austin, Texas, Oct 26-27,2009.

 

S. Amarchinta, H. Kanitkar and D. Kudithipudi, “Robust and High Performance Subthreshold Standard Cells”, in proc. 52nd IEEE Midwest Symposium on Circuits and Systems (MWCAS), Aug. 2009.

 

H.Kanitkar and D. Kudithipudi, “Subthreshold Design space exploration of a Guassian Normal Basis Multiplier”, in proceedings of IEEE Workshop on Unique Chips and Systems, Boston, April 2009.

 

S. Katrue and D.Kudithipudi, “GALEOR: Leakage Reduction Technique for CMOS Circuits", proceedings of 15th IEEE International Conference on Electronics, Circuits and Systems, Malta, August 2008.

 

D. Kudithipudi and E.John, “On Estimation of Static Power-Performance in TCAM”, in proc. 51st IEEE Midwest Symposium on Circuits and Systems (MWSCAS), Aug. 2008, pp. 783-786.

 

B.Baylav, L.Fuller, D.Kudithipudi, “A New Test Chip for CMOS Manufacturing Laboratory Courses at RIT”, in proc. of 17th Biennial University/Government/Industry Micro/Nano Symposium, Louisville, Kentucky, UGIM 2008.

 

D. Kudithipudi, P.Nair, and E.John, “On Estimation and Optimization of Leakage Power in CMOS Multipliers”, in proc. 50th IEEE Midwest Symposium on Circuits and Systems (MWSCAS), Aug. 2007, pp. 859-862.

 

V.Chinta and D.Kudithipudi, “Minimum Leakage Vector Pattern Estimation”, in proc. 50th IEEE Midwest Symposium on Circuits and Systems (MWSCAS), Aug. 2007, pp. 1066-1069.

 

D. Kudithipudi and E. John, “Parametrical Characterization of leakage power in Nanoscale Technologies”, IBM’s Austin Conference on Energy Efficient Design, July 2005.

 

D. Kudithipudi and E.John, “Parametrical Characterization of Leakage Power in Embedded System Caches using Gated-Vss”, proceedings of International Association of Technology and Education for Circuits and Systems, Marina Del Rey, LA, pp: 493–076, October 2005.

 

D. Kudithipudi and E. John, “A Combinatorial Approach to Suppress Leakage in Nanoscale SRAM cells”, proceedings of IEEE Midwest Symposium on Circuits and Systems, Cincinnati, Ohio, August 2005.

 

D. Kudithipudi and E. John, “Parametrical Characterization of leakage power in Nanoscale Technologies”, IBM’s Austin Conference on Energy Efficient Design, July 2005.

 

D.Kudithipudi and E.John, “A framework to moderate leakage power in nanoscale CMOS SoC devices”, Nano Summit Research Conference, Houston, March 2005.

 

D. Kudithipudi, S. Petko, and E. John, “Cache Leakage Power Analysis in Embedded Applications”, proceedings of IEEE Midwest Symposium on Circuits and Systems, Hiroshima, Japan, Vol. II, pp.517–520, July 2004.

 

S. Petko, D. Kudithipudi and E. John, “Memory System Characterization for Multimedia Applications”, proceedings of International Signal Processing Conference (ISPC), Dallas, TX. March 31–April 3, 2003.

Patents

Cory Merkel, Dhireesha Kudithipudi, "Thermal management apparatuses with temperature sensing resistive random access memory devices and methods thereof", US Patent 8750065, 2014.

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