Rochester IEEE Society and RIT host GlobalFoundries’ semiconductor research leader

Director Min-hwa Chi discusses advances in 14 nanometer CMOS process development technologies

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Min-hwa Chi

From one integrated circuit generation to another, electronic device core processors have added more transistors, even while decreasing in size. Continual advances to the structure, storage and overall capabilities of integrated circuits might even improve upon these dimensions.

Rochester Institute of Technology will host Min-hwa Chi, senior fellow and director of advanced programs with GlobalFoundries, who will discuss these advances, particularly 14-nanometer CMOS finFET technology. The latter is the underlying, three-dimensional approach being taken by semiconductor companies to produce higher capacity microprocessors used in electronic devices.

Chi presents from noon to 1 p.m. on Friday, Feb. 6, in the Xerox Auditorium, located in RIT’s Kate Gleason College of Engineering. The event is free and open to RIT students, faculty, staff and the general public. Light refreshments will be served after the presentation.

CMOS, or complementary metal-oxide-semiconductor technology, is used to construct integrated circuits for electronic devices. As the circuit board dimensions decrease, finFET—a complex technique where elements of the integrated circuit are built in three-dimensional layers—has been found to improve the power capabilities within the structure, and ultimately electronic devices.

The event is co-sponsored by the Rochester sections of the IEEE Electron Devices and Computational Intelligence Societies as well as the computer, microelectronic and electrical engineering departments in RIT’s Kate Gleason College of Engineering.

Prior to working with GlobalFoundries in 2011, Min-hwa Chi worked at Intel and National Semiconductor in the U.S. and TSMC in Taiwan and SMIC in China. He is an IEEE senior member, holds 137 U.S. patents and has authored multiple books and technical papers published in areas of CMOS Logic and memory. He received his bachelor’s, master’s and doctoral degrees in electrical engineering at the National Taiwan University (1974), University of Rhode Island (1977), and University of California-Berkeley (1982), respectively.