Teju Das Headshot

Teju Das

Associate Professor, Electrical and Microelectronic Engineering

Department of Electrical and Microelectronic Engineering
Kate Gleason College of Engineering

585-475-2174
Office Location
Office Mailing Address
79 Lomb Memorial Drive, 09-3181 Rochester, NY 14623

Teju Das

Associate Professor, Electrical and Microelectronic Engineering

Department of Electrical and Microelectronic Engineering
Kate Gleason College of Engineering

Education

MS, Ph.D., Rochester Institute of Technology

Bio

Tejasvi (Teju) Das joined RIT after 15 years in the semiconductor industry, where he led technology and product development for high-volume analog and mixed-signal ICs in sensing, audio, and haptics applications for mobile and consumer devices. He holds more than 180 U.S. and international patents spanning IoT sensing, power management, audio systems, interference robustness, self-calibration, and signal-processing algorithms. He directs the RF/Analog/Mixed-Signal Laboratory (RAMLab), a group of about twenty graduate and undergraduate researchers.

RAMLab works in four primary areas. In hardware security, the group studies analog-native and cross-domain hardware Trojans, which exploit the continuous-valued behavior of analog circuits to conceal malicious activity beneath conventional verification. In neuromorphic computing, the group builds time-domain architectures that encode computation in signal delay rather than amplitude, using emerging non-volatile devices. In sensing and power management, the group develops low-power sensor interfaces and dynamically reconfigurable regulators for biomedical and IoT systems. In analog circuit design with emerging devices, the group treats FeFETs, memristors, and ECRAM as design primitives rather than as memory, using measurement-calibrated compact models so that device physics informs circuit topology directly. Common to all four is a cross-layer approach spanning devices, circuits, and systems. The group's designs are fabricated at commercial foundries, with students carrying each chip from architecture through tapeout and measurement. This work has been recognized with two IEEE best-paper awards.

He received his Ph.D. in Microsystems Engineering from RIT under the supervision of Dr. P. R. Mukund. He is a Senior Member of IEEE, an elected member of the IEEE Circuits and Systems Society Analog Signal Processing Technical Committee, and Vice Program Chair of the IEEE Microelectronics Design & Test Symposium. He teaches undergraduate and graduate courses in analog and mixed-signal IC design and is actively recruiting motivated B.S., M.S., and Ph.D. students for research positions in RAMLab.

585-475-2174

Areas of Expertise

Select Scholarship

Selected Papers

  • Best Paper Award: D. Zeznick, J. O'Donnell and T. Das, "A High-Efficiency LDO With Adaptive PSRR and Bandwidth Enhancements," 2025 23rd IEEE NEWCAS Conference
  • Best Student Paper Award: J. O’Donnell, E. Greenfield, H. Hendy, K. Bergthold, C. Merkel, T. Das, "Evaluating FeFET and Memristor Performance in Time-Domain Computing Applications," IEEE Midwest Symposium on Circuits and Systems
  • D. Zeznick, R. Ranganatham, J. O’Donnell, C. Adiga, W. B. Wright and T. Das, "A Sub-μA LDO With Analog Adaptive Enhancements for Scalable PSRR, Load Range, and Bandwidth Extension," in IEEE Transactions on Circuits and Systems I
  • S. Maru, M. Kost, E. King, J. Wardlaw, X. Zhao, R. Gawde, and T. Das, "A 124 µW Inductive Sensing SoC With Force and Position Detection for Virtual Buttons," IEEE Transactions on Industrial Electronics
  • R. Ranganatham, M. Melnyk, M. Zuzak, and T. Das, "Analog Hardware Trojans: An Overlooked Threat," IEEE Design & Test
  • K. Bergthold, H. Hendy, E. Greenfield, C. Merkel, and T. Das, “Enabling Long Chain Lengths and High Throughput for Time-Domain Neuromorphic Computing", IEEE Transactions on Circuits and Systems II, Mar 2025
  • An analog payload trojan via power-supply harmonic coupling in front-end circuits, IEEE NEWCAS Conference, June 2024
  • Design Space Exploration of Memristor-based Delay Cells for Time-domain Neuromorphic Computing, IEEE International Symposium on Circuits and Systems, May 2024

Selected Patents:

  • Methods and apparatuses for providing a haptic output signal to a haptic actuator, U.S. 11,150,733, 2021
  • Reducing audio artifacts in a system for enhancing dynamic range of an audio signal path, U.S. 10,785,568, 2020
  • Methods and apparatuses for controlling operation of a vibrational output system, U.S. 10,976,825, 2021
  • Q-factor enhancement in resonant phase sensing of resistive-inductive-capacitive sensors, U.S. 11,537,242, 2022
  • On-chip resonance detection and transfer function mapping of RLC sensors, U.S. 10,935,620, 2021
  • Use of reference sensor in resonant phase sensing system, U.S. 10,921,159, 2021
  • Phase compensation in a resonant phase detector, U.S. 11,255,892, 2022
  • Virtual button characterization engine, U.S. 11,079,874, 2021 (53 citations, second inventor)
  • False triggering prevention in a resonant phase sensing system, U.S. 10,642,435, 2020 (30 citations)
  • Single-Capacitor Inductive Sense Systems, U.S. 12,442,683, 2025

Currently Teaching

EEEE-480
4 Credits
This is an introductory course in analog electronic circuit analysis and design. The course covers the following topics: (1) Diode circuit DC and small-signal behavior, including rectifying as well as Zener-diode-based voltage regulation; (2) MOSFET current-voltage characteristics; (3) DC biasing of MOSFET circuits, including integrated-circuit current sources; (4) Small-signal analysis of single-transistor MOSFET amplifiers and differential amplifiers; (5) Multi-stage MOSFET amplifiers, such as cascade amplifiers, and operational amplifiers; (6) Frequency response of MOSFET-based single- and multi-stage amplifiers; (7) DC and small-signal analysis and design of bipolar junction transistor (BJT) devices and circuits; (8) Feedback and stability in MOSFET and BJT amplifiers.
EEEE-499
0 Credits
One semester of paid work experience in electrical engineering.
EEEE-510
3 Credits
This is a foundation course in analog integrated circuit design and is a prerequisite for the graduate courses in RF & mixed-signal IC design (EEEE-726 and EEEE-730). The course covers the following topics: (1) Review of CMOS technology, MOSFET models and Frequency Response (2) Single-stage amplifiers (3) Current mirrors and biasing (4) Current and voltage references (5) Differential amplifiers (6) Cascoding (7) Feedback and Stability (8) OTAs (9) Matching and layout techniques (10) Multi-stage op-amps (11) Noise Analysis (12) Linearity in analog circuits (13) Switched-cap circuits.
EEEE-610
3 Credits
This is a foundation course in analog integrated circuit design and is a prerequisite for the graduate courses in RF & mixed-signal IC design (EEEE-726 and EEEE-730). The course covers the following topics: (1) Review of CMOS technology, MOSFET models and Frequency Response (2) Single-stage amplifiers (3) Current mirrors and biasing (4) Current and voltage references (5) Differential amplifiers (6) Cascoding (7) Feedback and Stability (8) OTAs (9) Matching and layout techniques (10) Multi-stage op-amps (11) Noise Analysis (12) Linearity in analog circuits (13) Switched-cap circuits.
EEEE-726
3 Credits
This is the first course in the graduate course sequence in analog integrated circuit design EEEE-726 and EEEE-730. This course covers the following topics: (1)Fundamentals of data conversion (2) Nyquist rate digital-to-analog converters (3) Quantization noise and analysis (4) Nyquist rate analog-to-digital converters (5) Sample and hold circuits (6) Voltage references (7) Static and dynamic testing of digital-to-analog converters (8) Cell based design strategies for integrated circuits (9)Advanced topics in data conversion.
EEEE-789
3 Credits
Topics and subject areas that are not regularly offered are provided under this course. Such courses are offered in a normal format; that is, regularly scheduled class sessions with an instructor.