Look-up Table Containing Processor-in-Memory Cluster for Data-Intensive Applications

Synopsis

Patent US 11,775,312 B2 describes a look-up table containing processor-in-memory (PIM) for data-intensive applications. The invention provides a novel architecture that integrates processing capabilities directly within memory, specifically dynamic random-access memory (DRAM), to address the inefficiencies of traditional computing architectures where data must constantly move between separate processing units (CPUs/GPUs) and memory. This frequent data transfer, often referred to as the "memory wall" or "Von Neumann bottleneck," leads to significant power consumption and latency, particularly in data-intensive workloads.
A key novel aspect of this patent is the use of a PIM cluster within a DRAM array, where each PIM cluster contains a plurality of processing cores, a look-up table (LUT), and a router. This configuration allows processing to occur directly on the data where it resides in memory, minimizing data movement and substantially accelerating computation for data-intensive applications. The LUTs are programmable and can be configured for logic or arithmetic operations, providing flexibility in handling various types of computations. The router within each PIM cluster enables communication among the processing cores and with a centralized controller unit, ensuring efficient data flow and coordination across the integrated system.
The processing cores within the PIM clusters are designed to perform multiply-accumulate (MAC) operations, which are fundamental to many data-intensive tasks. The patent details implementations for 8-bit, 12-bit, and 16-bit fixed-point MAC operations, along with methods for handling various arithmetic operations like two's complement conversion, sign extraction, and shifting. This fine-grained integration of processing logic directly into the memory fabric represents a significant departure from conventional architectures, offering a substantial boost in computational throughput and energy efficiency.
The commercial potential of this invention is considerable, especially for applications that are heavily data-dependent and currently bottlenecked by memory access speeds. The ability to perform computations in-situ dramatically reduces power consumption and latency, making it highly attractive for various industries.

Possible applications include:
Artificial Intelligence and Machine Learning: Deep Neural Networks (DNNs), which involve massive matrix multiplications and convolutions, could see significant performance gains and energy savings. This is particularly relevant for training large models and for real-time inference in edge devices where power efficiency is critical.
​​​​​​​Big Data Analytics: Applications involving large-scale data processing, such as database queries, graph analytics, and real-time data streams, would benefit from reduced data movement and faster computational throughput.
High-Performance Computing (HPC): Scientific simulations, financial modeling, and other computationally intensive tasks could be accelerated, allowing for more complex analyses and faster results.
Cryptocurrency Mining and Security: The patent highlights the potential for accelerating algorithms like AES (Advanced Encryption Standard), which involves repetitive data-intensive operations, indicating its utility in cryptographic applications and secure data processing.
Image and Signal Processing: Real-time processing of large image or video datasets, common in autonomous systems, medical imaging, and surveillance, could achieve higher speeds and lower power consumption.

This PIM architecture offers a compelling solution to the escalating demands of data-intensive computing, providing a path toward more efficient, powerful, and scalable computing systems across a wide range of applications.