Dhireesha Kudithipudi

Dhireesha Kudithipudi

Research Professor
Kate Gleason College of Engineering
Computer Engineering

2017 Submissions

Journal Paper

Mnatzaganian, James, Ernest Fokoue, and Dhireesha Kudithipudi. "A Mathematical Formalization of Hierarchical Temporal Memory’s Spatial Pooler." Frontiers in Robotics and AI. (2017): 1-14. Web. *

2016 Submissions

Full Patent

Merkel, Cory and Dhireesha Kudithipudi. "Method and Apparatus for Training Memristive Learning Systems." U.S. Patent 15/159,949. 20 May 2016.

2015 Submissions

Journal Paper

Kudithipudi, Dhireesha, et al. "Design and Analysis of a Neuromemristive Reservoir Computing Architecture for Biosignal Processing." Frontiers in Neuroscience 9. (2015): 0. Web. «

Kudithipudi, Dhireesha, Cory Merkel, and A Polepalli. "Semi-Flipped Learning Modules with Educational Design Patterns in Interdisciplinary Brain Inspired Computing Course." Proceedings of International journal on Technology and Education. (2015): 0. Print. «

Book Chapter

Kudithipudi, Dhireesha, Cory Merkel, and S Kurinec. "Neuromorphic Devices and Circuits." Nano-CMOS and Post-CMOS Electronics: Devices and Modeling. New York, NY: Springer, 2015. 0. Print. «

Published Conference Proceedings

Zyarah, Abdullah and Dhireesha Kudithipudi. "Reconfigurable Hardware Architecture of the Spatial-pooler in Hierarchical Temporal Memory." Proceedings of the IEEE International System on Chip. Ed. IEEE. China, China: n.p., 2015. Print. «

Donahue, C, et al. "Design and Analysis of Neuromemristive Echo State Networks with Limited-precision Synapses." Proceedings of the Computational Intelligence for Security and Defense Applications (CISDA). Ed. IEEE. Verona, NY: n.p., 2015. Web. «

Invited Keynote/Presentation

Kudithipudi, Dhireesha. "Intelligence-on-Chip: Design Motifs with NeuroMemristive Systems." DASS at DAC. IEEE. SanJose, CA. 7 Jun. 2015. Address.

2014 Submissions

Journal Paper

Khedkar, Ganesh, Dhireesha Kudithipudi, and Garrett Rose. "Power Profile Obfuscation using Nanoscale Memristive Devices to Counter DPA Attacks." IEEE Transactions on Nanotechnology 10. 99 (2014): 1-10. Print. «

Published Conference Proceedings

Kudithipudi, Dhireesha, et al. "Memristive Reservoir Computing Architecture for Epileptic Seizure Detection." Proceedings of the Biologically Inspired Cognitive Architectures, MIT, Boston, Nov 7-9 2014. Ed. Unknown. Boston, MA: Procedia Computer Science, 2014. Web. ∆

Kudithipudi, Dhireesha, et al. "On Designing Circuit Primitives for Cortical Processors with Memristive Hardware." Proceedings of the IEEE System on Chip Conference, Las Vegas, Sep 2-5, 2014. Ed. Unknown. Piscataway, NJ: IEEE, 2014. Print. «

2013 Submissions

Journal Paper

Soltiz, Mike, et al. "Memristor-based Neural Logic Block for Non-linearly Separable Functions." IEEE Transactions on Computers 62. 8 (2013): 1597-1603. Print. *

Published Conference Proceedings

Kudithipudi, Dhireesha, Colin Donahue, and Ganesh Khedkar. "Applications of CMOS/Memristor Neuromorphic Systems in Computing and Security." Proceedings of the CyberSci Summit. Ed. ICFI. Beltsville, MD: n.p., 2013. Web. ∆

2012 Submissions

Published Conference Proceedings

Kudithipudi, Dhireesha and Ganesh Khedkar. "Reconfigurable Memristor Motifs for Mitigating Multi-Objective Security Attacks." Proceedings of the Network Science and Reconfigurable Systems for Cybersecurity Conference. Ed. ICFI. Beltsville, MD: n.p., 2012. Web. ˜

2010 Submissions

Formal Presentation

Kudithipudi, Dhireesha. “Lightweight Energy Prediction Filters for Solar-Powered Wireless Sensor Networks.” 6th International Workshop on Unique Chips and Systems. Atlanta, GA. 4-8 December 2010. Presentation.

Published Article

Tavva, Sreeharsha and Dhireesha Kudithipudi. “Variation tolerant 9T SRAM cell design.” Proceedings of the 20th symposium on Great lakes symposium on VLSI (GLSV LSI ‘10). 16-18 May 2010. 55-60. Web. "  «

Amarchinta, Sumanth and Dhireesha Kudithipudi. “Performance enhancement of subthreshold circuits using substrate biasing and charge-boosting buffers.” Proceedings of the 20th symposium on Great lakes symposium on VLSI (GLSVLSI ‘10). 16-18 May 2010. 369-372. Web. "  «

Amarchinta, Sumanth and Dhireesha Kudithipudi. “Ultra Low Energy Standard Cell Design Optimization For Performance and Placement Algorithm.” IEEE International Green Computing Conference. 15-18 August 2010. 509-517. Web. "  *

Kwasinski, A., and D. Kudithipudi. “Towards integrated circuit thermal profiling for reduced power consumption: Evaluation of distributed sensing techniques.” IEEE International Green Computing Conference. 15-18 August 2010. 503-507. Print. *