Karl Hirschman Headshot

Karl Hirschman


Department of Electrical and Microelectronic Engineering
Kate Gleason College of Engineering
Director of Microelectronic Engineering
Associate Department Head

Office Location
Office Mailing Address
82 Lomb Memorial Drive, Rochester, NY 14623

Karl Hirschman


Department of Electrical and Microelectronic Engineering
Kate Gleason College of Engineering
Director of Microelectronic Engineering
Associate Department Head


BS, MS, Rochester Institute of Technology; Ph.D., University of Rochester


Dr. Karl D. Hirschman, professor in the department of electrical and microelectronic engineering at the Rochester Institute of Technology. He has also been the faculty director of the Semiconductor Nanofabrication Laboratory since 2001. Dr. Hirschman received his B.S. in Microelectronic Engineering and the M.S. in Electrical Engineering from Rochester Institute of Technology. He received the Ph.D. degree in Electrical Engineering from the University of Rochester. Dr. Hirschman has published over 50 technical papers in refereed journals and conference proceedings. He is an active member in the IEEE, MRS and SID. He has served as an officer of the Rochester IEEE Electron Device Society local chapter for the last fifteen years, and he coordinates the IEEE Annual EDS Activities in Western NY Conference. He teaches courses at RIT in process and device technology ranging from undergraduate freshman to graduate level. His current research activities are in silicon and metal-oxide thin-film electronics. For more about Dr. Hirschman see: http://people.rit.edu/kdhemc/

Select Scholarship

Published Article
McCabe, Andrew M., Robert G. Manley, J.G. Couillard, C.A. Kosik Williams, and K.D. Hirschman. “High Field Induced Stress Suppression of GIDL Effects in Accumulation-Mode P Channel TFTs.” ECS Transactions, 33.5 (2010): 95-103. Web. "  É *
Rettmann, Ryan D., J.G. Couillard, and K.D. Hirschman. “Characterization of Silicon-on-GlassSubstrates using Variable Angle Spectroscopic Ellipsometry.” ECSTransactions, 33.5 (2010): 135-142. Web. "  É *
Formal Presentation
Veeramachaneni, Bharat, J.D. Winans, S. Hu, D. Kawamura, P.M. Fauchet, K. Witt, and K.D. Hirschman. “A Novel Technique for Localized Formationof SOI Active Regions.” Porous Semiconductors - Science and Technology (PSST-2010) 7th International Conference. 14- 19 March 2010. Presentation. " 

Currently Teaching

3 Credits
An introduction to the basics of integrated circuit fabrication. The electronic properties of semiconductor materials and basic device structures are discussed, along with fabrication topics including photolithography diffusion and oxidation, ion implantation, and metallization. The laboratory uses a four-level metal gate PMOS process to fabricate an IC chip and provide experience in device design - and layout (CAD), process design, in-process characterization and device testing. Students will understand the basic interaction between process design, device design and device layout.
3 Credits
Statistics and Design of Experiments will study descriptive statistics, measurement techniques, SPC, Process Capability Analysis, experimental design, analysis of variance, regression and response surface methodology, and design robustness. The application of the normal distribution and the central limit theorem will be applied to confidence intervals and statistical inference as well as control charts used in SPC. Students will utilize statistical software to implement experimental design concepts, analyze case studies and design efficient experiments.
1 - 5 Credits
A supervised investigation within a microelectronic engineering area of student interest.
3 Credits
A senior or graduate level course on the application of simulation tools for physical design and verification of the operation of semiconductor devices. The goal of the course is to provide a more in-depth understanding of device physics through the use of simulation tools. Technology CAD tools include Silvaco (Athena/Atlas) for device simulation. The lecture will explore the various models that are used for device simulation, emphasizing the importance of complex interactions and 2-D effects as devices are scaled deep-submicron. Laboratory work involves the simulation of various device structures. Investigations will explore how changes in the device structure can influence device operation.
3 Credits
This course focuses on CMOS manufacturing. Topics include CMOS process technology, work in progress tracking, CMOS calculations, process technology, long channel and short channel MOSFET, isolation technologies, back-end processing and packaging. Associated is a lab for on-campus section (01) and a graduate paper/case study for distance learning section (90). The laboratory for this course is the student-run factory. Topics include Lot tracking, query processing, data collection, lot history, cycle time, turns, CPK and statistical process control, measuring factory performance, factory modeling and scheduling, cycle time management, cost of ownership, defect reduction and yield enhancement, reliability, process modeling and RIT's advanced CMOS process. Silicon wafers are processed through an entire CMOS process and tested. Students design unit processes and integrate them into a complete process. Students evaluate the process steps with calculations, simulations and lot history, and test completed devices.
1 - 4 Credits
This course number is used to fulfill the internship requirement for the master of engineering degree program. The student must obtain the approval of the department head before registering for this course.
1 - 6 Credits
The master's thesis in microelectronic engineering requires the student to prepare a written thesis proposal for approval by the faculty; select a thesis topic, adviser and committee; present and defend thesis before a thesis committee; prepare a written paper in a short format suitable for submission for publication in a journal.
3 Credits
This course number is used to fulfill the graduate project requirement under the non-thesis option for the MS degree in Microelectronic Engineering. During this course, the student will be required to perform a literature survey, and conduct a limited scope investigation. Appropriate topics for this project may include: (i) development/characterization/documentation of semiconductor fabrication processes, (ii) characterization/measurement/documentation of semiconductor devices, or (iii) detailed simulation/design/documentation of semiconductor devices or processes. Alternative topics may be pursued with approval of the faculty advisor. The student must obtain the approval of an appropriate faculty member to supervise the paper before registering for this course.
1 - 3 Credits
This course number should be used by students who plan to study a topic on an independent basis under the guidance of a faculty member. A written proposal with an independent study form is to be submitted to the sponsoring faculty member and approved by the department head prior to the commencement of work.
1 - 9 Credits
Dissertation research by the candidate for an appropriate topic as arranged between the candidate and the research advisor.
0 Credits
Continuation of Thesis

In the News

  • October 11, 2021

    person in a full clean suit sitting in a clean room.

    RIT receives $1 million grant to upgrade and expand its cleanroom facility

    The Kate Gleason College of Engineering was awarded a $1 million Higher Education Capital Matching Grant (HECAP) from New York state. The award will be used to upgrade and expand the college’s cleanroom facility to accommodate the growth of research in biomedical technologies such as drug delivery and lab-on-chip devices.