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Robert Bowman

Robert Bowman

Phone: 585-475-7917

Dr. Robert J. Bowman received the B.S. degree in electrical engineering from Penn State University, the M.S. degree in electrical engineering from San Jose State University, and the Ph.D. degrees in electrical engineering in and in bioengineering from the University of Utah.

Dr. Bowman has consulted or has held engineering positions with IBM, Siemens Corp., Analog Devices, Chevron Research, Eastman Kodak Company, Mint Technology, and most recently at LSI Logic where he was Director of Analog and Mixed-Signal Engineering. He has held faculty positions at the University of Utah, the University of Vermont, the University of Rochester, and Rochester Institute of Technology.  He was Department Head of Electrical Engineering at RIT until 2006 and is now Professor of Electrical Engineering and Lab Director of the RIT Analog Devices Integrated Microsystems Laboratory. His areas of interest include analog integrated circuit design and technology, semiconductor device physics, integrated transducers, biomedical sensors, and RF integrated circuits. His current research work is concentrated on smart MEMs sensors, miniature near-field antennas, thin film acoustic cavity resonators, and devices and circuits fabricated in thin film silicon on glass.

Patents Awarded

  • Power Harvesting Device and Method of Use Thereof, RIT filed jointly with PPC, Inc., December 2010. Awarded October 2012.
  • Coaxial Connector with Integrated Mating Force Sensor and Methods of Use Thereof, RIT filed jointly with PPC, Inc., US Patent 7,850482 B2 Dec 14, 2010.
  • System and Method for Providing an Ultra Low Power Scalable Digital-to-Analog Converter (DAC) Architecture, RIT filed jointly with National Semiconductor, Inc., US Patent No. 7,504,979, April 2009.
  • Method and Apparatus for Improving the Tolerance of Integrated Resistors. US Patent No. 6,549,062, April 15, 2003, LSI Logic
  • Method and apparatus for the use of embedded resistance to linearize and improve the matching properties of transistors. US Patent No. 6,621,146, Sept. 2003. LSI Logic
  • A microcomputer-based fluid infusion system to monitor and control fluid replacement therapy in burn patients.  U.S. Patent No.  4,291,692, September 29, 1981. Univ of Utah
  • A velocity-compensated infrared fluid flow measurement system.  U.S. Patent  No. 4,314,484, February 9, 1982. Univ of Utah

Selected Publications

  • Electrical Engineering Freshman Practicum, R J Bowman, Wiley, Five editions, 5th edition, 2009, ISBN 0470-43125-2.
  • Electrical Engineering Sophomore Practicum, R J Bowman, Wiley, Three editions, 3rd edition, 2006, ISBN 0-471-77767-6
  • Christopher James Nassar, Joseph Revelli, Carlo Kosik Williams, and Robert John Bowman, A Charge Based Compact Model Core for Thin-Film Silicon on Glass PMOSFETs Operated in Accumulation, IEEE Journal of Display Technology, August. 2010
  • Christopher James Nassar, Joseph Revelli, Carlo Kosik Williams and Robert John Bowman, Fringing Field Effects in Thin-Film Silicon Transistors on Glass, IEEE Journal of Display Technology, August. 2010
  • Christopher James Nassar, Joseph Revelli, and Robert John Bowman, Application of the Homotopy Analysis Method to Poisson-Boltzmann Equation for Semiconductor Devices, Communications in Nonlinear Science and Numerical Simulation, Volume 16, Issue 6, Elsevier, June 2011, Pages 2501-2512
  • S. A. Marshall, C. J. Nassar, J. W. Choi, J. Jang, C. A. Kosik Williams, E. J. Mozdy, T. J. Tredwell, R.J. Bowman, The 1/f Noise Performance for TFTs Fabricated in Three TFT Technologies: Monocrystalline Silicon on Glass, Low Temperature Polysilicon on Glass, and Silicon on Insulator, Proceedings of the Electrochemical Society Transactions Volume 33, Issue 5, October, 2010
  • C. J. Nassar, T. J. Tredwell, C. A. Kosik Williams, J. F. Revelli, and R. J. Bowman, A Charge Based Compact Modeling Technique for Monocrystalline TFTs on Glass, Proceedings of the Electrochemical Society Transactions Volume 33, Issue 5. October, 2010
  • A Charge Based Compact Model for an Enhancement Mode PMOSFET Operated in Accumulation, Christopher James Nassar, Carlo Kosik Williams, David Dawson-Elli, and Robert John Bowman, Proceedings of the IEEE Workshop on Compact Thin Film Transistor Modeling for Circuit Simulation, London, England, September, 2009
  • Chris Nassar, Carlo Kosik-Williams, Dave Dawson-Elli, Robert J. Bowman, Single Fermi Level, Thin Film CMOS on Glass: The Behavior of Enhancement Mode PMOSFETs from Cutoff through Accumulation, IEEE Transactions on Electron Devices, September, 2009.
  • I. Knausz and R. Bowman, A Low Power, Scalable, DAC Architecture for Liquid Crystal Display Drivers, IEEE Journal of Solid State Circuits, September, 2009.
  • Brian D. Mott, Chris P. Natoli, Chris M. Feuerstein, Noah Montena, Joseph F. Revelli, Jr., Robert J. Bowman, “ Sensing RF Connector Tightness Using a Grounded Plate Capacitive Structure” IEEE Sensors Journal, November, 2008.
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