Karl Hirschman Headshot

Karl Hirschman

Professor
Department of Electrical and Microelectronic Engineering
Kate Gleason College of Engineering

585-475-5130
Office Location
Office Mailing Address
82 Lomb Memorial Drive, Rochester, NY 14623

Karl Hirschman

Professor
Department of Electrical and Microelectronic Engineering
Kate Gleason College of Engineering

Education

BS, MS, Rochester Institute of Technology; Ph.D., University of Rochester

Bio

Dr. Karl D. Hirschman a Professor in the Electrical & Microelectronic Engineering Department at the Rochester Institute of Technology. He has also been the faculty director of the Semiconductor & Microsystems Fabrication Laboratory since 2001. Dr. Hirschman received his B.S. in Microelectronic Engineering and the M.S. in Electrical Engineering from Rochesterr Institute of Technology. He received the Ph.D. degree in Electrical Engineering from the University of Rochester. Dr. Hirschman has published over 50 technical papers in refereed journals and conference proceedings. He is an active member in the IEEE, MRS and SID. He has served as an officer of the Rochester IEEE Electron Device Society local chapter for the last fifteen years, and he coordinates the IEEE Annual EDS Activities in Western NY Conference. He teaches courses at RIT in process and device technology ranging from undergraduate freshman to graduate level. His current research activities are in silicon and metal-oxide thin-film electronics. For more about Dr. Hirschman see: http://people.rit.edu/kdhemc/

585-475-5130

Currently Teaching

MCEE-205
3 Credits
Statistics and Design of Experiments will study descriptive statistics, measurement techniques, SPC, Process Capability Analysis, experimental design, analysis of variance, regression and response surface methodology, and design robustness. The application of the normal distribution and the central limit theorem will be applied to confidence intervals and statistical inference as well as control charts used in SPC. Students will utilize statistical software to implement experimental design concepts, analyze case studies and design efficient experiments.
MTSE-790
1 - 9 Credits
Dissertation research by the candidate for an appropriate topic as arranged between the candidate and the research advisor.
MCEE-201
3 Credits
An introduction to the basics of integrated circuit fabrication. The electronic properties of semiconductor materials and basic device structures are discussed, along with fabrication topics including photolithography diffusion and oxidation, ion implantation, and metallization. The laboratory uses a four-level metal gate PMOS process to fabricate an IC chip and provide experience in device design - and layout (CAD), process design, in-process characterization and device testing. Students will understand the basic interaction between process design, device design and device layout.
MCEE-601
3 Credits
This course introduces the beginning graduate student to the fabrication of solid-state devices and integrated circuits. The course presents an introduction to basic electronic components and devices, lay outs, unit processes common to all IC technologies such as substrate preparation, oxidation, diffusion and ion implantation. The course will focus on basic silicon processing. The students will be introduced to process modeling using a simulation tool such as SUPREM. The lab consists of conducting a basic metal gate PMOS process in the RIT clean room facility to fabricate and test a PMOS integrated circuit test ship. Laboratory work also provides an introduction to basic IC fabrication processes and safety.
MTSE-793
0 Credits
Continuation of Thesis

In the News

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Published Article
McCabe, Andrew M., Robert G. Manley, J.G. Couillard, C.A. Kosik Williams, and K.D. Hirschman. “High Field Induced Stress Suppression of GIDL Effects in Accumulation-Mode P Channel TFTs.” ECS Transactions, 33.5 (2010): 95-103. Web. "  É *
Rettmann, Ryan D., J.G. Couillard, and K.D. Hirschman. “Characterization of Silicon-on-GlassSubstrates using Variable Angle Spectroscopic Ellipsometry.” ECSTransactions, 33.5 (2010): 135-142. Web. "  É *
Formal Presentation
Veeramachaneni, Bharat, J.D. Winans, S. Hu, D. Kawamura, P.M. Fauchet, K. Witt, and K.D. Hirschman. “A Novel Technique for Localized Formationof SOI Active Regions.” Porous Semiconductors - Science and Technology (PSST-2010) 7th International Conference. 14- 19 March 2010. Presentation. "